package redstone import "testing" // TestQueueDelay 延迟队列:Delay 到期才处理(红石与方块更新.md §2)。 func TestQueueDelay(t *testing.T) { q := NewQueue() q.Push(Update{X: 1, Delay: 0}) q.Push(Update{X: 2, Delay: 2}) var got []int32 for tick := 0; tick < 3; tick++ { q.Tick(func(u Update) { got = append(got, u.X) }) } if len(got) != 2 || got[0] != 1 || got[1] != 2 { t.Fatalf("延迟处理顺序异常: %v", got) } if q.Pending() != 0 { t.Fatalf("队列应清空,剩 %d", q.Pending()) } } // TestQueueIterCap 迭代上限:超限丢弃并计数(红石与方块更新.md §6 防级联风暴)。 func TestQueueIterCap(t *testing.T) { q := NewQueue() q.iterCap = 10 for i := 0; i < 30; i++ { q.Push(Update{X: int32(i)}) } handled := 0 q.Tick(func(u Update) { handled++ }) if handled != 10 { t.Fatalf("处理数期望 10,实际 %d", handled) } if q.Dropped() != 20 { t.Fatalf("丢弃数期望 20,实际 %d", q.Dropped()) } } // TestSpreadWire 红石信号沿线缆传播:每格衰减 1(红石与方块更新.md §3)。 func TestSpreadWire(t *testing.T) { // 连续线缆:y=64,x∈[0..5] isWire := func(x, y, z int32) bool { return y == 64 && z == 0 && x >= 0 && x <= 5 } power := map[[3]int32]uint8{} set := func(x, y, z int32, v uint8) { power[[3]int32{x, y, z}] = v } SpreadWire([]Src{{X: 0, Y: 64, Z: 0, Level: 15}}, isWire, set) if got := power[[3]int32{1, 64, 0}]; got != 14 { t.Fatalf("x=1 信号期望 14,实际 %d", got) } if got := power[[3]int32{5, 64, 0}]; got != 10 { t.Fatalf("x=5 信号期望 10(15-5),实际 %d", got) } } // TestSpreadWireGap 线缆断点中断信号(x=2 非线缆 → x≥3 无信号)。 func TestSpreadWireGap(t *testing.T) { isWire := func(x, y, z int32) bool { return y == 64 && z == 0 && x >= 0 && x <= 5 && x != 2 } power := map[[3]int32]uint8{} set := func(x, y, z int32, v uint8) { power[[3]int32{x, y, z}] = v } SpreadWire([]Src{{X: 0, Y: 64, Z: 0, Level: 15}}, isWire, set) if _, ok := power[[3]int32{3, 64, 0}]; ok { t.Fatal("断点后不应有信号") } } // TestSpreadWireMultiSource 多源取最大(火把式叠加)。 func TestSpreadWireMultiSource(t *testing.T) { isWire := func(x, y, z int32) bool { return y == 64 && z == 0 && x >= 0 && x <= 3 } power := map[[3]int32]uint8{} set := func(x, y, z int32, v uint8) { power[[3]int32{x, y, z}] = v } SpreadWire([]Src{{X: 0, Y: 64, Z: 0, Level: 15}, {X: 3, Y: 64, Z: 0, Level: 15}}, isWire, set) // x=1:距两端各 1 格 → 14;x=2:距两端各 1 格 → 14 if got := power[[3]int32{2, 64, 0}]; got != 14 { t.Fatalf("x=2 信号期望 14,实际 %d", got) } }